Avaya 03-300430 Home Security System User Manual


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ATM-SYNC (ATM Synchronization)
Issue 1 June 2005 615
2. Test the active Tone-Clock circuit in the master PN with test tone-clock location
long.
Check the Error Log for TDM-CLK errors, and verify that TDM Bus Clock Circuit Status
Inquiry test (#148) passes successfully.
If Test #148 fails with an Error Code 2–32, see TDM-CLK (TDM Bus Clock)
on
page 2252 to resolve the problem. If not, continue with the following steps.
3. For Duplicated Tone-Clock circuit packs in the master PN: Switch Tone-Clock circuit
packs on the master PN with set tone-clock location.
For Simplex Tone-Clock circuit packs in the master PN: replace the primary and
secondary (if administered) DS1 Interface circuit packs.
4. Investigate any other SYNC errors.
g. Error Type 2049: the ATM Expansion Interface circuit packs have errors that affect
synchronization. Test the ATM Expansion Interface circuit pack with test board
location.
This error is cleared by a “leaky bucket” strategy and takes up to one hour to clear (leak
away) the error counter once it is cleared.
h. Error Types 1, 257, and 513: noise on the DS1 line can cause transient alarms on
synchronization. Therefore, when a synchronization problem occurs on Error Types 1, 257,
or 513, a WARNING alarm is first raised for 15 to 20 minutes before the alarm is upgraded
to a MINOR or MAJOR alarm.
System Technician-Demanded Tests: Descriptions and Error
Codes
Order of Investigation Short Test
Sequence
Long Test
Sequence
D/ND
1
1. D = Destructive, ND = Non-destructive
Test Synchronization test (#417) X X ND