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3
SPECIFICATIONS
3.5 Buffer Memory List
3
- 23
1
OVERVIEW
2
SYSTEM
CONFIGURATION
3
SPECIFICATIONS
4
SETTINGS AND
PROCEDURE TO
OPERATION
5
INSTALLATION AND
UNINSTALLATION
6
FUNCTIONS
7
MES INTERFACE
FUNCTION
CONFIGURATION TOOL
8
DB CONNECTION
SERVICE AND
SETTING TOOL
(From the previous page)
*1 Shows whether or not reading/writing is possible.
R: Only reading is possible. W: Only writing is possible.
R/W: Both reading and writing are possible.
(To the next page)
Table 3.15 Buffer memory list
Address
(Decimal(Hex))
Application Name
Initial
value
Read/
write
*1
Reference
section
248 to 799
(F8
H
to 31F
H
)
Use prohibited System area — — —
800 to 801
(320
H
to 321
H
)
Sampling/
monitoring
cycle area
Current cycle (Unit: second) 0 R
Section
3.6.6
802 to 803
(322
H
to 323
H
)
Maximum cycle (Unit: second) 0 R
804 to 999
(324
H
to 3E7
H
)
Use prohibited System area — — —
1000 to 1003
(3E8
H
to 3EB
H
)
Tag status area
Tag setting information 0 R
Section
3.6.7
1004 to 1007
(3EC
H
to 3EF
H
)
Sampling information 0 R
1008 to 1011
(3F0
H
to 3F3
H
)
Sampling error information 0 R
1012
(3F4
H
)
Sampling 1, error code 0 R
1013 to 1075
(3F5
H
to 433
H
)
Sampling 2 to
64, error codes
The composition of each area is the same as that of the Sampling 1,
error code.
Refer to
*2
for the assignment of each area.
1076 to 1289
(434
H
to 509
H
)
Use prohibited System area — — —
1290
(50A
H
)
Current tag
data value area
No. of requested tag 0 R/W
Section
3.6.8
1291
(50B
H
)
No. of stored tag 0 R
1292
(50C
H
)
Update count 0 R
1293
(50D
H
)
No. of components 0 R
1294 to 1299
(50E
H
to 513
H
)
System area — —
1300 to 1811
(514
H
to 713
H
)
Current tag data value 0 R
1812 to 3999
(714
H
to F9F
H
)
Use prohibited System area — — —
4000 to 4003
(FA0
H
to FA3
H
)
Access target
CPU setting
status area
Access target CPU setting information 0 R
Section
3.6.9
4004 to 4007
(FA4
H
to FA7
H
)
Access target CPU error information 0 R
4008
(FA8
H
)
Access target CPU 1, error code 0 R
4009 to 4071
(FA9
H
to FE7
H
)
Access target
CPU 2 to 64,
error codes
The composition of each area is the same as that of the Access target
CPU 1, error code.
Refer to
*3
for the assignment of each area.