Mitsubishi Electronics Q173CPU(N) Home Security System User Manual


 
APP - 11
A
PPENDICES
APPENDIX 2.2 The program example to execute plural Multiple CPU instruction by the
instructions of one time
This is the program example which executes to the Multiple same Motion CPU at
high speed by one instruction.
In this case, you must take an interlock with "To self CPU high speed interrupt
accept flag from CPU". When an instruction cannot be accepted even if it is
executed, it becomes "No operation".
The program which read the data for 10 points from D0 of the Motion CPU
installing the CPU No.2 to since D100 of the PLC CPU, the data for 10 points
from D200 of the Motion CPU to since D300 of the PLC CPU, and the data for 10
points from D400 of the Motion CPU to since D500 of the PLC CPU by starting of
X0 is shown as an example 1.
At this time, number of multiple CPU dedicated execute instructions at one
command should no exceed the maximum acceptable number of instructions
(Refer to Chapter 5.) of one Motion CPU.
When an maximum acceptable number of instructions is 32, the program which
made not to execute the multiple dedicated instructions when number of the
Multiple CPU dedicated execute instructions exceeds 32 is shown as an example
2.
<Example 1>
D451
PLS
M10
D51
M0
D50
SP.DDRD
D0 D100 M10H3E1
SM400
K10MOV
M11
M11
D251
K10MOV
M20
M21
M21
M0
X0
M2
D450
SP.DDRD
D400
D500
M30H3E1
M2
RST
K10MOV
M1
SET
M1
D250
SP.DDRD
D200 D300 M20H3E1
M1RST
M2
SET
M30 M31
M31
Read the data from D0 to D100,
and normality complete processing.
Read the data from D0 to D100,
and abnormality complete processing.
Read the data from D200 to D300,
and normality complete processing.
Read the data from D200 to D300,
and abnormality complete processing.
Read the data from D400 to D500,
and normality complete processing.
Read the data from D400 to D500,
and abnormality complete processing.
To self CPU high speed interrupt
accept flag from CPU 1
U3E1 G48.0
To self CPU high speed interrupt
accept flag from CPU 1
U3E1 G48.0
To self CPU high speed interrupt
accept flag from CPU 1
U3E1 G48.0