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5 MOTION DEDICATED PLC INSTRUCTION
(4) Self CPU operation data area used by Motion dedicated instruction (30H to 33H)
The complete status of the to self CPU high speed interrupt accept flag from
CPUn is stored in the following address.
Shared
CPU
memory
address
Name Description
30H(48)
To self CPU high speed interrupt
accept flag from CPU1
31H(49)
To self CPU high speed interrupt
accept flag from CPU2
32H(50)
To self CPU high speed interrupt
accept flag from CPU3
33H(51)
To self CPU high speed interrupt
accept flag from CPU4
This area is used to check whether to self CPU high speed interrupt accept
flag from CPUn can be accepted or not.
0: To self CPU high speed interrupt accept flag from CPUn accept usable.
1: To self CPU high speed interrupt accept flag from CPUn accept disable.