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Chapter 6 Sequence Program Used for Positioning Control
(2) Signal state
Signal name Signal state
Device
QD77MS2
QD77MS4
QD77MS16
Interface
signal
PLC READY signal ON PLC CPU preparation completed Y0
READY signal ON QD77MS preparation completed X0
All axis servo ON ON All axis servo ON Y1
Synchronization flag ON
QD77MS buffer memory
Accessible
X1
Axis stop signal OFF Axis stop signal is OFF Y4 to Y7 [Cd.180] Axis stop
M code ON signal OFF M code ON signal is OFF X4 to X7 [Md.31] Status: b12
Error detection signal OFF There is no error X8 to XB [Md.31] Status: b13
BUSY signal OFF BUSY signal is OFF XC to XF X10 to X1F
Start complete signal OFF Start complete signal is OFF X10 to X13 [Md.31] Status: b14
External
signal
Forced stop input signal ON There is no forced stop input –
Stop signal OFF Stop signal is OFF –
Upper limit (FLS) ON Within limit range –
Lower limit (RLS) ON Within limit range –
: When the synchronous setting of the PLC CPU is made in the nonsynchronous mode, this must be
provided as an interlock.
When it is made in the synchronous mode, no interlock must be provided in the program because the flag is
turned ON when calculation is run on the PLC CPU.
[5] Time chart for restarting
[QD77MS4 operation example]
0
V
t
1
Dwell time
81 8 0
00
Positioning start signal
Axis stop signal
READY signal
Start complete signal
BUSY signal
Error detection signal
Cd. 6 Restart command
Positioning complete signal
PLC READY signal
Md. 26 Axis operation status
[Y10]
[Y4]
[Y0]
[X0]
[X10]
[XC]
[X14]
[X8]
All axis servo ON
[Y1]
(Note): Refer to Section 3.3 for input/output signal of QD77MS16.
Fig. 6.14 Time chart for restarting