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Section 2-4
CPU-mounted type: C120-LK201-V1
[Setting the rear switches]
Synchronization (DIP SW3-3 to SW3-6)
Set SW3-3, SW3-5, and SW3-6 to “ON” (1), and
SW3-4 to “OFF” (0). (Set these to “Internal”.)
Unit #, parity, and transfer code (DIP SW1-1 to SW1-5)
Set SW1-1 to SW1-5 to “OFF” (“0”).
* Parity is fixed at Even Parity. Transfer code is fixed
at ASCII 7 data bits and 2 stop bits.
Baud rate (DIP SW2-1 to SW2-4)
Set these switches to “1010” to select 9600 bps.
Set these switches to “0010” to select 19200 bps.
1-to-1/1-to-N selection (DIP SW2-6)
Set SW2-6 to “0” (1-to-N).
Instruction level (DIP SW2-7, SW2-8)
Set these switches to “1”.
(Levels 1, 2, and 3 are enabled.)
CTS selection (DIP SW3-1 and SW3-2)
Set SW3-1 to “ON” (1) and SW3-2 to “OFF” (0). (Set
this always to “0V”.)