Index
499
WC:
sec11
412
WD:
sec11
413
WG:
sec11
412
WH:
sec11
411
WJ:
sec11
413
WL:
sec11
411
WP:
sec11
427
WR:
sec11
410
XZ:
sec11
429
host link errors:
sec11
431
Host Link Systems, error bits and flags:
sec3
40
HR area:
sec3
60
I
I/O bit
definition:
sec3
31
limits:
sec3
31
I/O numbers:
sec3
33
I/O points, refreshing:
5–24 on
284 , 285
I/O response time, one-to-one link communications:
6–4 on
339
I/O response times:
6–4 on
333
I/O status, maintaining:
sec3
42
I/O table
clearing:
4–1 to 4–6
89
reading:
4–1 to 4–6
87
registration:
4–1 to 4–6
84
verification:
4–1 to 4–6
86
Verification Error flag:
sec3
43
I/O Units.
See
Units
I/O word
allocation:
sec3
31
definition:
sec3
31
limits:
sec3
31
incrementing:
5–18 to 5–19
204
indirect addressing:
5–1 to 5–14
119
input bit
application:
sec3
31
definition:
sec1
3
input device, definition:
sec1
3
input point, definition:
sec1
3
input signal, definition:
sec1
3
instruction set:
appB
443
7SEG(––):
5–24 on
304
ADB(50):
5–20 to 5–23
219
ADD(30):
5–18 to 5–19
205
ADDL(54):
5–18 to 5–19
206
AND:
4–1 to 4–6
68 ;
5–1 to 5–14
129
combining with OR: 4−1 to 4−6 69
AND LD:
4–1 to 4–6
71 ;
5–1 to 5–14
130
combining with OR LD: 4−1 to 4−6 73
use in logic blocks: 4−1 to 4−6 72
AND NOT:
4–1 to 4–6
68 ;
5–1 to 5–14
129
ANDW(34):
5–20 to 5–23
250
APR(69):
5–20 to 5–23
239
ASC(86):
5–18 to 5–19
194
ASFT(17):
5–15 to 5–17
157
ASL(25):
5–15 to 5–17
154
ASR(26):
5–15 to 5–17
154
AVG(––):
5–20 to 5–23
235
BCD(24):
5–18 to 5–19
181
BCDL(59):
5–18 to 5–19
182
BCMP(68):
5–15 to 5–17
174
BCNT(67):
5–24 on
286
BIN(23):
5–18 to 5–19
180
BINL(58):
5–18 to 5–19
181
BSET(71):
5–15 to 5–17
160
CLC(41):
5–18 to 5–19
205
CMP(20):
5–15 to 5–17
170
CMPL(60):
5–15 to 5–17
172
CNT:
5–1 to 5–14
145
CNTR(12):
5–1 to 5–14
148
COLL(81):
5–15 to 5–17
164
COLM(64):
5–18 to 5–19
201
COM(29):
5–20 to 5–23
249
CPS(––):
5–15 to 5–17
178
CPSL(––):
5–15 to 5–17
179
DBS(––):
5–20 to 5–23
231
DBSL(––):
5–20 to 5–23
232
DEC(39):
5–18 to 5–19
204
DIFD(14):
4–7 on
109 ;
5–1 to 5–14
131–132
using in interlocks: 5−1 to 5−14 136
using in jumps: 5−1 to 5−14 138
DIFU(13):
4–7 on
109 ;
5–1 to 5–14
131–132
using in interlocks: 5−1 to 5−14 136
using in jumps: 5−1 to 5−14 138
DIST(80):
5–15 to 5–17
162
DIV(33):
5–18 to 5–19
212
DIVL(57):
5–18 to 5–19
213
DMPX(77):
5–18 to 5–19
188
DSW(––):
5–24 on
307
DVB(53):
5–20 to 5–23
224
END(01):
4–1 to 4–6
70 ;
5–1 to 5–14
124 , 138
execution times:
6–1 to 6–3
324–332
FAL(06):
5–24 on
278
FALS(07):
5–24 on
278
FCS(––):
5–24 on
286
FDIV(79):
5–18 to 5–19
214
FPD(––):
5–24 on
288
HEX(––):
5–18 to 5–19
195
HKY(––):
5–24 on
311
HMS(66):
5–18 to 5–19
184
IL(02):
4–7 on
105 ;
5–1 to 5–14
135–137
ILC(03):
4–7 on
105 ;
5–1 to 5–14
135–137
INC(38):
5–18 to 5–19
204
INT(89):
5–20 to 5–23
262
IORF(97):
5–24 on
284
JME(05):
5–1 to 5–14
137
JMP(04):
5–1 to 5–14
137
JMP(04) and JME(05):
4–7 on
107
KEEP(11):
5–1 to 5–14
133
in controlling bit status: 4−7 on 109
ladder instructions:
4–1 to 4–6
67
LD:
4–1 to 4–6
68 ;
5–1 to 5–14
129
LD NOT:
4–1 to 4–6
68 ;
5–1 to 5–14
129
LINE(63):
5–18 to 5–19
200
LMSG(47):
5–24 on
282
MAX(––):
5–20 to 5–23
233
MBS(––):
5–20 to 5–23
229
MBSL(––):
5–20 to 5–23
230
MCMP(19):
5–15 to 5–17
169
MCRO(99):
5–20 to 5–23
260
MIN(––):
5–20 to 5–23
234
MLB(52):
5–20 to 5–23
224
MLPX(76):
5–18 to 5–19
185
MOV(21):
5–15 to 5–17
159
MOVB(82):
5–15 to 5–17
166
MOVD(83):
5–15 to 5–17
167
MPRF(61):
5–24 on
285
MSG(46):
5–24 on
281
MTR(––):
5–24 on
316
MUL(32):
5–18 to 5–19
211
MULL(56):
5–18 to 5–19
212
MVN(22):
5–15 to 5–17
159
NOP(00):
5–1 to 5–14
138
NOT:
4–1 to 4–6
66
operands:
4–1 to 4–6
64