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Teledyne API Model T360/T360M Operation Manual Principles of Operation
211
7.4.4.2. SIGNAL SYNCHRONIZATION AND DEMODULATION
The signal emitted by the IR photo-detector goes through several stages of
amplification before it can be accurately demodulated. The first is a pre-
amplification stage that raises the signal to levels readable by the rest of the
synch/demod board circuitry. The second is a variable amplification stage that is
adjusted at the factory to compensate for performance variations of mirrors,
detectors, and other components of the optical bench from instrument to
instrument.
The workhorses of the sync/demod board are the four sample-and-hold circuits
that capture various voltage levels found in the amplified detector signal needed
to determine the value of CO2 MEAS and CO2 REF. They are activated by
logic signals under the control of a compact programmable logic device (PLD),
which in turn responds to the output of the Segment Sensor and M/R Sensor
depicted in Figure 7-14.
The four sample and hold
circuits are:
ACTIVE WHEN: DESIGNATION
IR BEAM PASSING THROUGH SEGMENT SENSOR PULSE IS:
Measure Gate MEASUREMENT cell of GFC Wheel HIGH
Measure Dark Gate MEASUREMENT cell of GFC Wheel LOW
Reference Gate REFERENCE cell of GFC Wheel HIGH
Reference Dark Gate REFERENCE cell of GFC Wheel LOW
Timing for activating the Sample and Hold circuits is provided by a phase lock
loop circuit (PLL). Using the segment sensor output as a reference signal the
PLL generates clock signal at ten times that frequency. This faster clock signal is
used by the PLD to make the sample and hold circuits capture the signal during
the center portions of the detected waveform, ignore the rising and falling edges
of the detector signal.
Sample & Hold
Active
Detector
Output
Sample & Hold
Inactive
Figure 7-16: Sample & Hold Timing
07272B DCN6552