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Programming Appendix A
Note (1) Index registers have been used to increase the usability of subroutines called with JSB(982). The
actual addresses in I/O memory of the first input parameter word and first output parameter word
are automatically stored in index registers IR0 and IR1, respectively. This enables accessing the in-
put parameter words in the subroutine by indirectly addressing IR0 to read the input parameters for
specific processing, as well as accessing the output parameter words in the subroutine by indirectly
addressing IR1 to write data for output.
(2) When a subroutine is called with SBS(091), the entire subroutine will be skipped when the input con-
dition is OFF, making it impossible to program processing for OFF input conditions (e.g., stopping
processing or decelerating for an OFF input condition in a subroutine that performs jogging for an
ON input condition).
(3) When a subroutine is called with SBS(091), it is not possible to tell from within the subroutine if the
subroutine has been executed before. This makes it impossible to perform different processing in
different cycles, such as spreading processing over multiple cycles.
JSB(982) Operation
Note JSB(982) will be executed even if the input condition is OFF.
The following process is performed when JSB(982) is executed.
1. When the subroutine is called, the status of the input condition for JSB(982) is stored in the corresponding
Subroutine Input Condition Flag.
2. The actual addresses in I/O memory of the first input parameter word and first output parameter word are
automatically stored in index registers IR0 and IR1, respectively
3. The specified subroutine is executed through RET(093).
4. Program execution continues with the next instruction after JSB(982).
Note If JSB(982) is within a program section interlocked by IL(002) and ILC(003), the subroutine will still be
executed, but the interlock will apply to the program in the subroutine as well.
JSB
N
S
D
N: Subroutine number
S: First input parameter word
D: First output parameter word
Input condition
Address Corresponding subroutines
Word Bits
A000 00 to 15 SBN000 to SBN015
A001 00 to 15 SBN016 to SBN031
A002 00 to 15 SBN032 to SBN047
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A015 00 to 15 SBN240 to SBN255