Cisco Systems 15454-FTF2 Home Security System User Manual


 
Figures
xxvi
Cisco ONS 15454 Reference Manual, R8.5.x
78-18106-01
Figure 5-7 ML100T-12 Faceplate and Block Diagram 5-20
Figure 5-8 ML100X-8 Faceplate and Block Diagram 5-22
Figure 5-9 ML1000-2 Faceplate and Block Diagram 5-24
Figure 5-10 ML-MR-10 Faceplate and Block Diagram 5-26
Figure 5-11 CE-100T-8 Faceplate and Block Diagram 5-29
Figure 5-12 CE-1000-4 Faceplate and Block Diagram 5-32
Figure 5-13 CE-MR-10 Faceplate and Block Diagram 5-35
Figure 5-14 GBICs with Clips (left) and with a Handle (right) 5-39
Figure 5-15 CWDM GBIC with Wavelength Appropriate for Fiber-Connected Device 5-40
Figure 5-16 G-Series with CWDM/DWDM GBICs in Cable Network 5-41
Figure 5-17 Mylar Tab SFP 5-41
Figure 5-18 Actuator/Button SFP 5-42
Figure 5-19 Bail Clasp SFP 5-42
Figure 6-1 FC_MR-4 Faceplate and Block Diagram 6-3
Figure 7-1 Example: ONS 15454 Cards in a 1:1 Protection Configuration (SMB EIA) 7-2
Figure 7-2 Example: ONS 15454 Cards in a 1:N Protection Configuration (SMB EIA) 7-3
Figure 7-3 Unprotected Low-Density Electrical Card Schemes for EIA Types 7-7
Figure 7-4 Unprotected High-Density Electrical Card Schemes for EIA Types 7-8
Figure 7-5 1:1 Protection Schemes for Low-Density Electrical Cards with EIA Types 7-9
Figure 7-6 1:N Protection Schemes for Low-Density Electrical Cards with EIA Types 7-10
Figure 7-7 1:1 Protection Schemes for High-Density Electrical Cards with UBIC or MiniBNC EIA Types 7-11
Figure 7-8 ONS 15454 in an Unprotected Configuration 7-14
Figure 8-1 CTC Software Versions, Node View 8-2
Figure 8-2 CTC Software Versions, Network View 8-3
Figure 8-3 Node View (Default Login View) 8-9
Figure 8-4 Terminal Loopback Indicator 8-11
Figure 8-5 Facility Loopback Indicator 8-11
Figure 8-6 Network in CTC Network View 8-13
Figure 8-7 CTC Card View Showing a DS1 Card 8-16
Figure 8-8 Static IP-Over-CLNS Tunnels 8-19
Figure 8-9 TL1 Tunnels 8-20
Figure 10-1 ONS 15454 Timing Example 10-3
Figure 11-1 ONS 15454 Circuit Window in Network View 11-4
Figure 11-2 BLSR Circuit Displayed on the Detailed Circuit Map 11-12
Figure 11-3 One VT1.5 Circuit on One STS 11-13