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Auxiliary Area Allocations Appendix D
Step Instructions
Note When a double-length operand is used, add 1 to the value shown in the length column in the above
table.
I/O Refresh Instruction
Note When a double-length operand is used, add 1 to the value shown in the length column in the above
table.
COMPARISON TABLE
LOAD
CTBL 882 4 36.5 --- Registering target value table and
starting comparison for 1 target
value
259.6 --- Registering target value table and
starting comparison for 48 target
values
22.1 --- Executing range comparison for 1
range
113.7 --- Executing range comparison for 16
ranges
22.1 --- Only registering target value table
for 1 target value
240.1 --- Only registering target value table
for 48 target values
20.9 --- Registering a sampling counter
target value table and starting
comparison
42.8 --- Analog output
SPEED OUTPUT SPED 885 4 23.7 --- Continuous mode
32.7 --- Independent mode
42.9 --- Analog output
SET PULSES PULS 886 4 15.9 --- Setting pulse output in relative
mode
16.1 --- Setting pulse output in absolute
mode
31.5 --- Absolute output mode (electronic
cam)
PULSE OUTPUT PLS2 887 4 53.5 --- ---
ACCELERATION CON-
TROL
ACC 888 4 42.5 --- Continuous mode
44.1 --- Independent mode
18.7 --- Analog output
Instruction Mnemonic Code Length
(steps)
(See
note.)
ON execution
time (
µs)
Hardware
implementation
Conditions
STEP DEFINE STEP 008 2 24.3 --- Step control bit ON
13.0 --- Step control bit OFF
STEP START SNXT 009 2 9.1 --- ---
Instruction Mnemonic Code Length
(steps)
(See
note.)
ON execution
time (
µs)
Hardware
implementation
Conditions
I/O REFRESH IORF 097 3 7.7 --- Refreshing 1 input word
7.6 --- Refreshing 1 output word
Instruction Mnemonic Code Length
(steps)
(See
note.)
ON execution
time (
µs)
Hardware
implementation
Conditions