Mitsubishi Electronics Q172HCPU Home Security System User Manual


 
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2 MULTIPLE CPU SYSTEM
2.1.5 Processing time of the Multiple CPU system
(1) Processing of the Multiple CPU system
Each CPU module of the Multiple CPU system accesses to the modules
controlled by self CPU with which the CPU base unit or extension base unit is
installed, and the other CPU through the bus (base unit patterns and extension
cables). However, a multiple CPU module cannot use the bus simultaneously.
When a multiple CPUs have accessed the bus simultaneously, the CPUs which
performed buss access later remain in "waiting state" until the CPU currently
using the bus completes its processing. In a Multiple CPU system, the above
waiting time (duration while a CPU remains in waiting state) causes an I/O delay
or prolonged scan time.
(2) When the waiting time becomes the longest
In the Multiple CPU system, the wait time of self CPU becomes the longest in the
following conditions:
• When is using a total of four PLC CPUs/Motion CPUs are used in the Multiple
CPU system.
• When the extension base units are used.
• When the intelligent function modules handling large volumes of data are
installed in the extension base unit(s).
• When a total of four CPUs are used and the four CPUs have simultaneously
accessed a module installed in an extension base unit.
• When there are many automatic refresh points between a PLC CPU and a
Motion CPU.
(3) When shortening the processing time of the Multiple CPU system
The processing time of the Multiple CPU system can be shortened in the
following methods:
• Install all modules with many access points such as MELSECNET/10(H) and
CC-Link refreshes together in the CPU base unit.
• Control all modules with many access points such as MELSECNET/10(H) and
CC-Link refreshes using only one PLC CPU so that they are not accessed by
two or more CPUs simultaneously.
• Reduce the number of refresh points of MELSECNET/10(H), CC-Link, etc.
• Reduce the number of automatic refresh points of the PLC CPUs/Motion
CPUs.