Mitsubishi Electronics FX3U Garage Door Opener User Manual


 
350
FX3S/FX3G/FX3GC/FX3U/FX3UC Series
Programming Manual - Basic & Applied Instruction Edition
13 High-Speed Processing – FNC 50 to FNC 59
13.4 FNC 53 – HSCS / High-Speed Counter Set
13.4 FNC 53 – HSCS / High-Speed Counter Set
Outline
This instruction compares a value counted by a high-speed counter with a specified value, and immediately sets an
external output (Y) if the two values are equivalent each other.
For the counter interrupt using HSCS instruction, refer to Section 36.6.
1. Instruction format
2. Set data
3. Applicable devices
S1: "D.b" is available only in FX3U and FX3UC PLCs. However, index modifiers (V and Z) are not available.
S2: This function is supported only in FX
3G/FX3GC/FX3U/FX3UC PLCs.
S3: This function is supported only in FX
3U/FX3UC PLCs.
S4: When using the counter interrupt function in FX
3U/FX3UC PLCs, specify an interrupt pointer.
For counter interrupt using HSCS instruction, refer to Section 36.6.
Explanation of function and operation
1. 32-bit operation (DHSCS)
When the current value of a high-speed counter (C235 to C255) specified in becomes the comparison value
[ +1, ] (for example, when the current value changes from "199" to "200" or from "201" to "200" if the
comparison value is K200), the bit device is set to ON regardless of the operation cycle. This instruction is
executed after the counting processing in the high-speed counter.
Operand Type Description Data Type
Data to be compared with the current data value of a high-speed counter or word device
number.
32-bit binary
Device number of a high-speed counter [C235 to C255] 32-bit binary
Bit device number to be set to ON when the compared two values are equivalent to each
other
Bit
Oper-
and
Type
Bit Devices Word Devices Others
System User Digit Specification System User
Special
Unit
Index Constant
Real
Number
Charac-
ter String
Pointer
XYMTCSD
.b KnX KnY KnM KnS T C D R
U\G
VZModify K H E "
"P
S2 S3  

 S1
S4
Mnemonic Operation Condition
32-bit Instruction
13 steps DHSCS
Continuous
Operation
16-bit Instruction
Mnemonic Operation Condition
FNC 53
HSCS
D
S
1
S
2
D
S
1
S
2
D
S
2
S
1
S
1
D
K2,147,483,647
FNC 53
DHSCS
=
Set to ON.
Comparison
value
Comparison
source
Output
destination
S
1
S
2
D
S
1
S
2
D
S
2
Command
input