Z(f) Constant Output Impedance Design
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current was 40 A. The waveforms show the effect of capacitor depopulation on the
impedance profile above 1 MHz as pairs of high frequency MLCC capacitors are
removed (banks 1-9) per the bank designations depicted in Figure A-7.
Simulation comparisons are made in Figure A-8 for the two extreme cases of the
decoupling conditions of Figure A-7, with all MLCC plus two Al-Poly bulk capacitors in
place and all cavity MLCCs plus two Al-Poly bulk capacitors removed. Simulation depicts
a 6-layer distributed motherboard model. The VR model has a Type III feedback
compensated switching VR (swvr) and an average model (avgvr). It can be observed
from Figure A-8 that the switching model measurements agrees better beyond the VR
bandwidth (40 kHz) than the average model, while the average VR model performance
agrees with the overall trend. Slightly lower average model impedances are also
observed and other disagreements are attributed to imperfect assumptions about the
parasitics of the devices and specific adaptive voltage implementation in the VR
models.
Figure A-5. Photo of Motherboard Analyzed Showing High Frequency
MLCC Capacitors In the Socket Cavity and Bulk Capacitors
