Filter
Top Products
Chapter 6 NI-VXI Configuration Utility
©
National Instruments Corporation 6-17 VXI/VME-PCI8022 for Solaris
receives either a DTACK or BERR response, which it then passes to the
MXI bus. This is the default situation because many external masters do
not support VXI/MXI retries. If the external master does support retries,
it may be beneficial to disable the MXI-2 auto retry feature. With this
feature disabled, you can lower the MXI Bus Timeout because there
will be no delay due to the inward cycles being retried.
Note: The PCI-MXI-2 has a limit on the number of automatic retries it will
perform on any one cycle. If the limit is exceeded and the PCI-MXI-2
receives another retry, it will pass a retry back to the MXIbus even though
the Enable MXI-2 Auto Retry checkbox is checked.
A24/A32 Write Posting
This field determines whether to enable write posting for incoming
slave accesses to A24/A32 VXI/VME shared RAM. By default this
option is disabled—the Enable A24/A32 Write Posting checkbox is
cleared.
Enabling write posting will increase the throughput of your inward
cycles. However, you should not enable write posting unless the
destination of your inward A24/A32 cycles is onboard RAM, because
cycles to onboard RAM will always complete successfully.
PCI Bus
The following paragraphs describe the options for the PCI Bus portion
of this editor.
User Window and Driver Window
The PCI-MXI-2 driver requires the use of two PCI windows: a user
window and a driver window. Calling the
MapVXIAddress() function
allocates regions of the user window to your application.
VXIpeek()
and
VXIpoke() accesses are performed through this window. NI-VXI
uses the driver window to perform high-level functions such as
VXIin() and VXIout(), and to access registers on the PCI-MXI-2 and
VXI/VME-MXI-2.
The windows are mapped to PCI base address registers and determine
the amount of PCI memory space the PCI-MXI-2 requests from the PCI
system during initialization.