311
Chapter 24 Interrupt Control
1.Overview
Chapter 24 Interrupt Control
1. Overview
Interrupt control manages interrupt reception and arbitration.
2. Features
• Functions
• Detection of interrupt requests
• Priority determination (determined by level and number)
• Interrupt level propagation of the factor of the priority to the CPU
• Interrupt number propagation of the factor of the priority to the CPU
• Request (to the CPU) to return from stop mode by a valid interrupt (Wakeup)
• Interrupt level
• Reserved for System: level 0 to 14
• MNI : level 15
• Interrupt : level 16 to 31
• Interrupt disable : level 32
(As the interrupt level goes up, the number goes down.)
• Number of interrupt triggers
• NMI : 1
• Interrupt from peripheral functions: 128
• Delayed interrupt : 1
• Reserved for system (for REALOS): 2
• INT instruction : 111
Interrupt
priority
judging circuit
Interrupt requests
(peripheral function,
INT instruction, and
delayed interrupt)
Interrupt level/
interrupt vector
generator
Wakeup
NMI
Level
Vector number
HLDREQ
cancel
request
HALT
Priority judging circuit
To the CPU
NMI processing
