EM78P221/2N
8-Bit Microcontroller with OTP ROM
52 •
Product Specification (V1.0) 10.19.2007
(This specification is subject to change without further notice)
Binary Instruction HEX Mnemonic Operation
Status
Affected
0 0101 01rr rrrr 05rr INC R R+1 → R Z
0 0101 10rr rrrr 05rr DJZA R R-1 → A, skip if zero None
0 0101 11rr rrrr 05rr DJZ R R-1 → R, skip if zero None
0 0110 00rr rrrr 06rr RRCA R R(n) → A(n-1), R(0) → C, C → A(7) C
0 0110 01rr rrrr 06rr RRC R R(n) → R(n-1), R(0) → C, C → R(7) C
0 0110 10rr rrrr 06rr RLCA R R(n) → A(n+1), R(7) → C, C → A(0) C
0 0110 11rr rrrr 06rr RLC R R(n) → R(n+1), R(7) → C, C → R(0) C
0 0111 00rr rrrr 07rr SWAPA R R(0-3) → A(4-7), R(4-7) → A(0-3) None
0 0111 01rr rrrr 07rr SWAP R R(0-3) ↔ R(4-7) None
0 0111 10rr rrrr 07rr JZA R R+1 → A, skip if zero None
0 0111 11rr rrrr 07rr JZ R R+1 → R, skip if zero None
0 100b bbrr rrrr 0xxx BC R,b 0 → R(b) None
1
0 101b bbrr rrrr 0xxx BS R,b 1 → R(b) None
2
0 110b bbrr rrrr 0xxx JBC R,b if R(b)=0, skip None
0 111b bbrr rrrr 0xxx JBS R,b if R(b)=1, skip None
1 00kk kkkk kkkk 1kkk CALL k
PC+1 → SP, (lower 10 bits of k ) →
PC
None
1 01kk kkkk kkkk 1kkk JMP k (lower 10 bits of k) → PC None
1 1000 kkkk kkkk 18kk MOV A,k k → A None
1 1001 kkkk kkkk 19kk OR A,k A ∨ k → A Z
1 1010 kkkk kkkk 1Akk AND A,k A & k → A Z
1 1011 kkkk kkkk 1Bkk XOR A,k A ⊕ k → A Z
1 1100 kkkk kkkk 1Ckk RETL k k → A, [Top of Stack] → PC None
1 1101 kkkk kkkk 1Dkk SUB A,k k-A → A Z,C,DC
1 1110 1001 kkkk 1E9k BANK k k → R1(1:0) None
1 1110 1010 kkkk
k kkkk kkkk kkkk
1EAk
LCALL k
Next instruction: k kkkk kkkk kkkk;
PC+1 → [SP], k → PC
None
1 1110 1011 kkkk
k kkkk kkkk kkkk
1EBk
LJMP k
Next instruction: k kkkk kkkk kkkk;
k → PC
None
1 1111 kkkk kkkk 1Fkk ADD A,k k+A → A Z, C, DC
Note:
1
This instruction is not recommended for RF operation
2
This instruction cannot operate under RF.
