EM78P221/2N
8-Bit Microcontroller with OTP ROM
Product Specification (V1.0) 10.19.2007 • 13
(This specification is subject to change without further notice)
Bit 1 (ICIF): Port 6 input status change interrupt flag. Set when Port 6 input changes.
Reset by software.
0 = no interrupt occurs
1 = with interrupt request
Bit 0 (TCIF): TCC overflow interrupt flag. Set when TCC overflows. Reset by software.
0 = no interrupt occurs
1 = with interrupt request
NOTE
■ Bank 0-RF <2, 1, 0> can be cleared by instruction but cannot be set.
■ Bank1-RF <2, 1, 0> is an interrupt mask register.
■ Interrupt results from "logic AND" of Bank 0-RF <2, 1, 0> and Bank 1-RF <2, 1, 0>
with instruction “ENI”.
6.2.15 Bank 1-R5 ~R7 (I/O Port Control Register)
Bits 7~0: 0 = defines the relative I/O pin as output
1 = puts the relative I/O pin into high impedance
Bank 1-R5, R6 and R7 registers are all readable and writable.
6.2.16 Bank 1-R8 (I/O Port Control Register)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 0 0 0 0 0 C81 C80
Bits 7~2: not used, fixed to 0 all the time
Bits 1~0 (C81~C80): 0 = defines the relative I/O pin as output
1 = puts the relative I/O pin into high impedance
With Simulator]: P80 and P81 are General I/O pins
[With EM78P221/2N]: P80 is General input or output, but P81 is input or open-drain
output pin.
