EM78P221/2N
8-Bit Microcontroller with OTP ROM
26 •
Product Specification (V1.0) 10.19.2007
(This specification is subject to change without further notice)
6.5 Reset and Wake-up
6.5.1 Reset and Wake-up Operation
A reset is initiated by one of the following events:
1. Power-on reset
2. /RESET pin input "low"
3. WDT time-out (if enabled)
A device is kept in a reset condition for a duration of approximately 18ms
2
after the
reset is detected. When in LXT mode, the reset time is 500ms. Once a reset occurs,
the following functions are performed (the initial address is 000h):
The oscillator continues running, or will be started (if in sleep mode)
The Program Counter (R2) is set to all "0"
All I/O port pins are configured as input mode (high-impedance state)
The Watchdog Timer and prescaler are cleared
When power is switched On, the Memory switch register (R1) is set to 0
The CONT register bits are set to all "0" except for Bit 6 (INT flag)
The Bank 0-RF register bits are set to all "0"
The Bank 1-RB register bits are set to all "1"
The Bank 1-RC register bits are set to all "1"
The Bank 1-RD register bits are set to all "1"
The Bank 1-RE register bits are set to all "0"
The Bank 1-RF register bits are set to all "0"
Executing the “SLEP” instruction will assert the sleep (power down) mode. While
entering sleep mode, the Oscillator and TCC are stopped. The WDT (if enabled) is
cleared but keeps on running.
The controller can be awakened by:
Case 1 External reset input on /RESET pin
Case 2 WDT time-out (if enabled)
Case 3 Port 6 input status changes (if ICWE is enabled)
Case 4 Comparator output status changes (if CMPWE is enabled)
2
VDD=5V, Setup time period = 16.5ms ± 30%.
VDD=3V, Setup time period = 18ms ± 30%.
