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Epson Research and Development Page 117
Vancouver Design Center
Hardware Functional Specification S1D13504
Issue Date: 01/01/30 X19A-A-002-18
Figure 10-2: 15/16 Bit-Per-Pixel Format Memory Organization
Note
1. The Host-to-Display mapping described here assumes that a Little-Endian interface is
being used.
2. For 8/15/16 bit-per-pixel formats, R
n
, G
n
, B
n
represent the red, green, and blue color
components.
15-bpp:
R
0
4
Host Address
Display Buffer
bit 7 bit 0
Panel Display
P
0
P
1
P
2
P
3
P
4
P
5
P
6
P
7
R
0
3
R
0
2
R
0
1
R
0
0
G
0
4
G
0
3
G
0
2
G
0
1
G
0
0
B
0
4
B
0
3
B
0
2
B
0
1
B
0
0
G
1
2
G
1
1
G
1
0
B
1
4
B
1
3
B
1
2
B
1
1
B
1
0
16-bpp:
R
0
4
Host Address
Display Buffer
bit 7 bit 0
R
0
3
R
0
2
R
0
1
R
0
0
G
0
5
G
0
4
G
0
3
G
0
2
G
0
1
G
0
0
B
0
4
B
0
3
B
0
2
B
0
1
B
0
0
R
1
4
R
1
3
R
1
2
R
1
1
R
1
0
G
1
5
G
1
4
G
1
3
G
1
2
G
1
1
G
1
0
B
1
4
B
1
3
B
1
2
B
1
1
B
1
0
5-6-5 RGB
5-5-5 RGB
R
1
4
R
1
3
R
1
2
R
1
1
R
1
0
G
1
4
G
1
3
Byte 0
Byte 1
Byte 2
Byte 3
Byte 0
Byte 1
Byte 2
Byte 3
Panel Display
P
0
P
1
P
2
P
3
P
4
P
5
P
6
P
7
P
n
= (R
n
4-0
, G
n
5-0
, B
n
4-0
)
TFT
Passive
P
n
= (R
n
4-1
, G
n
5-2
, B
n
4-1
)
P
n
= (R
n
4-0
, G
n
4-0
, B
n
4-0
)
TFT
Passive
P
n
= (R
n
4-1
, G
n
4-1
, B
n
4-1
)