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Si4421
PIN ASSIGNMENT
This document refers to Si4421-IC rev A1.
See www.silabs.com/integration for any applicable errata.
See back page for ordering information.
Si4421 Universal ISM Band
FSK Transceiver
DESCRIPTION
Silicon Labs’ Si4421 is a single chip, low power, multi-channel FSK
t
ransceiver designed for use in applications requiring FCC or ETSI
conformance for unlicensed use in the 433, 868 and 915 MHz bands.
The Si4421 transceiver is a part of Silicon Labs’ EZRadio
TM
product
line, which produces a flexible, low cost, and highly integrated solution
t
hat does not require production alignments. The chip is a complete
analog RF and baseband transceiver including a multi-band PLL
synthesizer with PA, LNA, I/Q down converter mixers, baseband filters
and amplifiers, and an I/Q demodulator. All required RF functions are
integrated. Only an external crystal and bypass filtering are needed for
operation.
The Si4421 features a completely integrated PLL for easy RF design,
and its rapid settling time allows for fast frequency-hopping, bypassin
g
multipath fading and interference to achieve robust wireless links. The
PLL’s high resolution allows the usage of multiple channels in any o
f
t
he bands. The receiver baseband bandwidth (BW) is programmable to
accommodate various deviation, data rate and crystal tolerance
requirements. The transceiver employs the Zero-IF approach with I/Q
demodulation. Consequently, no external componen
t
s (except crystal
and decoupling) are needed in most applications.
The Si4421 dramatically reduces the load on the microcontroller with
t
he integrated digital data processing features: data filtering, clock
recovery, data pattern recognition, integrated FIFO and TX data
register. The automatic frequency control (AFC) feature allows the use
of a low accuracy (low cost) crystal. To minimize the system cost, the
Si4421 can provide a clock signal for the microcontroller, avoiding the
need for two crystals.
For low power applications, the Si4421 supports low duty cycle
operation based on the internal wake-up timer.
FUNCTIONAL BLOCK DIAGRAM
1
Si4421-DS rev 2.4r 0708
www.silabs.com
RF Parts Data processing units
Low Power parts
AMP OC
AMP OC
LNA
MIX
I
Q
MIX
Data Filt
CLK Rec
data
clk
BB Amp/Filt./Limiter
DQDCOMP
RSSI
AFC
Self cal.
PLL & I/Q VCO
w
ith cal.
ControllerXosc LBD
WTM
with cal.
CLK div
Bias
13
RF1
RF2
12
7
6
DCLK /
CFIL /
FFIT /
FSK /
DATA /
nFFS
FIFO
8 9
CLK
XTL /
REF
10
15
nINT /
VDI
ARSSI
2
3 4
5
11
SCK nSEL SDO nIRQ
14
1
VSS
VDD
SDI
16
nRES
PA
I/Q
DEMOD
FEATURES
Fully integrated (low BOM, easy design-in)
No alignment required in production
Fast-settling, programmable, high-resolution PLL synthesizer
Fast frequency-hopping capability
High bit rate (up to 115.2 kbps in digital mode and 256 kbps
in analog mode)
Direct differential antenna input/output
Integrated power amplifier
Programmable TX frequency deviation (15 to 240 kHz)
Programmable RX baseband bandwidth (67 to 400 kHz)
Analog and digital RSSI outputs
Automatic frequency control (AFC)
Data quality detection (DQD)
Internal data filtering and clock recovery
RX synchron pattern recognition
SPI compatible serial control interface
Clock and reset signals for microcontroller
16-bit RX Data FIFO
Two 8-bit TX data registers
Low power duty cycle mode
Standard 10 MHz crystal reference with on-chip tuning
Wake-u
p timer
2.2 to 3.8 V supply voltage
Low power consumption
Low standby current (0.3 A)
Compact 16 pin TSSOP package
Supports very short packets (down to 3 bytes)
Excellent temperature stability of the RF parameters
Good adjacent channel rejection/blocking
TYPICAL APPLICATIONS
Home security and alarm
Remote control, keyless entry
Wireless keyboard/mouse and other PC peripherals
Toy controls
Remote keyless entry
Tire pressure monitoring
Telemetry
Personal/patient data logging
Remote automatic meter reading