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AN-2030: Digital Diagnostic Monitoring Interface for Optical Transceivers F i n i s a r
9/26/02 Revision D Page 28
4. DDTC Electrical Interface Definition
Overview
The Digital Diagnostics Transceiver Controller (DDTC) IC manages all system
monitoring functions in the SFP transceiver module.
The DDTC is accessed through a 2-wire serial interface, utilizing the serial ID pins
defined by the SFP MSA:
§ SFP Pin 4 – MOD_DEF(2): Serial Data interface (SDA). The serial data pin is for
serial data transfer to and from the DDTC. The pin is open drain and may be
wire-ORed with other open drain or open collector interfaces.
§ SFP Pin 5 – MOD_DEF(1): Serial Clock interface (SCL). The serial clock input is
used to clock data into the DDTC on rising edges and clock data out on falling
edges.
2-Wire Interface Operation
Clock and Data Transitions: The SDA pin must be pulled high with an external resistor
or device. Data on the SDA pin may only change during SCL low time periods. Data
changes during SCL high periods will indicate a start or stop conditions depending on
the conditions discussed below. Refer to the timing diagram Figure 1 for further details.
Start Condition: A high-to-low transition of SDA with SCL high is a start condition that
must precede any other command. Refer to the timing diagram Figure 1 for further
details.
Stop Condition: A low-to-high transition of SDA with SCL high is a stop condition. After
a read sequence, the stop command places the DDTC into a low-power Standby Mode.
Refer to the timing diagram Figure 2 for further details.
Acknowledge Bit: All address bytes and data bytes are transmitted via a serial protocol.
The DDTC pulls SDA low during the ninth clock pulse to acknowledge that it has
received each word.
Standby Mode: The DDTC features a low-power mode that is automatically enabled
after power-on, after a stop command, and after the completion of all internal
operations.