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47 Chapter 4
outportb(base_addr+0x02,0x00); //MUX Scan Channel Control
outportb(base_addr+0x01,0x03); //Channel 1 Gain Setting
outportb(base_addr+0x02,0x11); // MUX Scan Channel Control
outportb(base_addr+0x01,0x08); // Channel 2 Gain Setting
outportb(base_addr+0x02,0x10); //Scan Channel 0-1
/***** Set Pacer *****/
outportb(base_addr+0x0f,0x7e);
outportb(base_addr+0x0d,10); //Divide By 1
outportb(base_addr+0x0d,0);
outportb(base_addr+0x0f,0xbe);
outportb(base_addr+0x0e,20); //Divide By 2
outportb(base_addr+0x0e,0);
/***** Set ISR *****/
Add your code here
/********************/
/***** Set System Interrupt *****/
Add your code here
/*********************************/
outportb(base_addr+0x09,0x00); // Disable Nor INT and Set Pacer
Trigger
outportb(base_addr+0x06,0x01); // Enable FIFO INT
outportb(base_addr+0x14,0x00); // Clear FIFO Interrupt
/***** Clear System Interrupt*****/
Add you code here
/*********************************/
outportb(base_addr+0x19,0x00); // Clear FIFO
outportb(base_addr+10,0); // Enable Pacer
while(i<=AD_NO)
{