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Pe r formance Considerations
Truly Scalable Performance
Based on the internal switched-fabric Hi-Star
™
architecture, the Lightning 9960
™
shows unmatched performance scalability. The more capacity and connectivity added to the
9960, the more total bandwidth increases. As stated previously, the 6.4GB/sec internal
bandwidth is reached when all 16 modules are installed and functioning.
When new application workloads are added to a 9960 system with an existing
workload, neither the new nor the existing workloads will suffer performance degradations
from the sharing of internal resources and bandwidth. The following series of tests proves
this point. By measuring the effects of one workload on another by only sharing the
controller, we can illustrate this phenomenon.
The Advantages of the Lightning 9900
™
Series Hi-Star
™
Architecture Over a
Shared Bus Architecture
A test was conducted that clearly demonstrates that the 9960 is not susceptible to
performance declines typical of a shared bus architecture. The test compares an OLTP
and a DSS workload running on both a Lightning 9960
™
and a 7700E system. We use the
7700E as an example of the shared bus storage system architecture. In both cases, the
same OLTP application workload was run on an HP/9000-K460
®
server and the same
DSS workload was run on two Sun E3000
®
dual-processor systems. In one case, both
processors were connected to a 7700E and then to a 9960 system
4
. There were no
differences, therefore, from the application software or the server platform variables. They
were the same for both sets of data. The only difference was the storage system in order to
illustrate the advantages of the Hi-Star
™
switched-fabric architecture. Experimental results
are shown in Figure 23.
8
The more capacity and
connectivity added to a
Lightning 9900
™
Series
system, the more total
internal bandwidth
increases.
Shared bus architectures
are susceptible to
performance bottlenecks.
Figure 23 –Test results
show the advantages of
the 9960 Hi-Star
™
architecture when
compared to a shared
bus architecture.
4
See Appendix A for configuration details.