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Programming the Status System 11Chapter 2
The Standard Operation Status and Questionable Data groups are 16 bits
wide, while Status Byte and Standard Event groups are only 8 bits wide. In
all 16 bit groups, the most significant bit (bit 15) is not used. Bit 15 always
returns a zero. The commands that set and query bits in the status registers
all use decimal integers. For example, you send *ESE 4 to set bit 2 of the
Standard Event enable register. Similarly, a response of "8" to the query
*ESE? indicates that bit 3 is set. The remainder of this chapter explains each
status group in detail.
Status Byte As Figure 2-4 indicates, the Status Byte is used to summarize information
from all the other status groups. The Status Byte differs from the other
groups in the way you read it and how its summary bit is processed.
The Status Byte can be read using either the *STB? common command or
by doing a SICL ireadstb function call. The ireadstb function reads the
status byte from the device specified.
The Status Byte summary bit actually appears in bit 6 (RQS) of the Status
Byte. When bit 6 is set, it generates an SRQ interrupt. This interrupt is a
low-level HP-IB message that signals the controller that at least one
instrument on the bus requires attention.
There are some subtle differences between *STB? and ireadstb. You can
use either method to read the state of bits 0-5 and bit 7. Bit 6 is treated
differently depending on whether you use *STB? or ireadstb. With ireadstb,
bit 6 returns RQS (request for service) which is cleared after the first
ireadstb. *STB? returns the MSS (master state summary). This is the
summary bit of the status byte register. It’s like a condition bit and will
return to zero only when all enabled bits in the status byte are zero. In
general, use ireadstb inside interrupt service routines, not *STB?.
Note In an SRQ interrupt service routine, you must clear the event register which
caused the SRQ (for example, STATus:QUES:EVEN?,
STATus:OPER:EVEN?, or *ESR?). Failure to do so will prevent future
SRQs from arriving.
Figure 2-4. Status Byte Register