2.15.4EMACModuleInitialization
PeripheralArchitecture
TheEMACmoduleisusedtosendandreceivedatapacketsoverthenetwork.Thisisdoneby
maintaininguptoeighttransmitandreceivedescriptorqueues.TheEMACmoduleconfigurationmust
alsobekeptup-to-datebasedonPHYnegotiationresultsreturnedfromtheMDIOmodule.Mostofthe
workindevelopinganapplicationordevicedriverforEthernetisprogrammingthismodule.
ThefollowingistheinitializationprocedureadevicedriverwouldfollowtogettheEMACtothestate
whereitisreadytoreceiveandsendEthernetpackets.Someofthesestepsarenotnecessarywhen
performedimmediatelyafterdevicereset.
1.Ifenabled,clearthedeviceinterruptenableintheEMACcontrolmoduleinterruptcontrolregister
(EWCTL).
2.CleartheMACcontrolregister(MACCONTROL),receivecontrolregister(RXCONTROL),and
transmitcontrolregister(TXCONTROL)(notnecessaryimmediatelyafterreset).
3.Initializeall16headerdescriptorpointerregisters(RXnHDPandTXnHDP)to0.
4.Clearall36statisticsregistersbywriting0(notnecessaryimmediatelyafterreset).
5.SetupthelocalEthernetMACaddressbyprogrammingtheMACindexregister(MACINDEX),MAC
addresshighbytesregister(MACADDRHI),andMACaddresslowbytesregister(MACADDRLO).
BesuretoprogramalleightMACaddresses-whetherthereceivechannelistobeenabledornot.
DuplicatethesameMACaddressacrossallunusedchannels.Whenusingmorethanonereceive
channel,startwithchannel0andprogressupwards.
6.Initializethereceivechannelnfreebuffercountregisters(RXnFREEBUFFER),receivechanneln
flowcontrolthresholdregister(RXnFLOWTHRESH),andreceivefilterlowpriorityframethreshold
register(RXFILTERLOWTHRESH),ifbufferflowcontrolistobeenabled.
7.Mostdevicedriversopenwithnomulticastaddresses,socleartheMACaddresshashregisters
(MACHASH1andMACHASH2)to0.
8.Writethereceivebufferoffsetregister(RXBUFFEROFFSET)value(typicallyzero).
9.InitiallyclearallunicastchannelsbywritingFFhtothereceiveunicastclearregister
(RXUNICASTCLEAR).Ifunicastisdesired,itcanbeenablednowbywritingthereceiveunicastset
register(RXUNICASTSET).Somedriverswilldefaulttounicastondeviceopenwhileotherswillnot.
10.Setupthereceivemulticast/broadcast/promiscuouschannelenableregister(RXMBPENABLE)with
aninitialconfiguration.Theconfigurationisbasedonthecurrentreceivefiltersettingsofthedevice
driver.Somedriversmayenablethingslikebroadcastandmulticastpacketsimmediately,while
othersmaynot.
11.SettheappropriateconfigurationbitsinMACCONTROL(donotsettheGMIIENbityet).
12.Clearallunusedchannelinterruptbitsbywritingthereceiveinterruptmaskclearregister
(RXINTMASKCLEAR)andthetransmitinterruptmaskclearregister(TXINTMASKCLEAR).
13.Enablethereceiveandtransmitchannelinterruptbitsinthereceiveinterruptmasksetregister
(RXINTMASKSET)andthetransmitinterruptmasksetregister(TXINTMASKSET)forthechannels
tobeused,andenabletheHOSTMASKandSTATMASKbitsusingtheMACinterruptmaskset
register(MACINTMASKSET).
14.Initializethereceiveandtransmitdescriptorlistqueues.
15.PreparereceivebywritingapointertotheheadofthereceivebufferdescriptorlisttoRXnHDP.
16.EnablethereceiveandtransmitDMAcontrollersbysettingtheRXENbitinRXCONTROLandthe
TXENbitinTXCONTROL.ThensettheGMIIENbitinMACCONTROL.
17.EnablethedeviceinterruptinEWCTL.
48EthernetMediaAccessController(EMAC)/SPRU941A–April2007
ManagementDataInput/Output(MDIO)
SubmitDocumentationFeedback
