Fujitsu FR30 Manual

A SERVICE OF

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42

CHAPTER 2 CPU

2.4 Data Structure

FR-series data is mapped as follows:

• Bit ordering: Little endian

• Byte ordering: Big endian

■

Bit Ordering

The FR series uses little endian for bit ordering.

Figure 2.4.1 shows data mapping in bit ordering mode.

Figure 2.4-1 Data Mapping in Bit Ordering Mode

■

Byte Ordering

The FR series uses big endian for byte ordering.

Figure 2.4.2 shows data mapping in byte ordering mode.

Figure 2.4-2 Data Mapping in Byte Ordering Mode

bit312927252321191715131197531

302826242220181614121086420

MSB

LSB

MSB LSB

bit31 23 15 7 0

10101010 11001100 11111111 00010001

bit

70

10101010

11001100

11111111

00010001

Memory

Address n

Address (n+1)

Address (n+2)

Address (n+3)